Multi-File Projects (make)

As C programs grow beyond simple examples, it becomes necessary to divide the code into multiple files for modularity, organization, and faster compilation.

1. Structure of a Multi-File Project

A large C project is typically organized into pairs of files:

• Header Files (.h): Contain declarations: function prototypes, macro definitions, and structure definitions (struct, typedef). They serve as the public interface for the module.
• Source Files (.c): Contain definitions: the actual body (implementation) of the functions declared in the header file.

Example File Organization

2. Cross-File Communication

A source file (.c) communicates with a header file (.h) using the #include preprocessor directive.

• To use a function from util.c within main.c, main.c must #include "util.h".
• The header file (util.h) provides the necessary function prototypes, allowing the compiler to verify that the function is called correctly.

Example

// --- main.c ---
#include <stdio.h>
#include "util.h" // Includes the function prototype

int main() {
    int total = calculate_sum(10, 20); // Compiler verifies this call using util.h
    printf("Total: %d\n", total);
    return 0;
}

// --- util.h ---
#ifndef UTIL_H
#define UTIL_H

// Function Prototype (Declaration)
int calculate_sum(int a, int b); 

#endif

// --- util.c ---
#include "util.h" // Includes its own prototype

// Function Definition (Implementation)
int calculate_sum(int a, int b) {
    return a + b;
}

3. Manual Compilation

Compiling multiple files manually requires compiling each source file into an intermediate object file (.o) and then linking them together.

# 1. Compile source files into object files (-c flag)
gcc -c main.c -o main.o
gcc -c util.c -o util.o

# 2. Link object files into the final executable (-o app flag)
gcc main.o util.o -o app 

4. Introduction to Makefiles (make)

The manual compilation process is tedious and inefficient, especially for large projects. If only one file (e.g., util.c) changes, you still have to recompile all files.

The make utility automates this process using a configuration file called the Makefile. A Makefile defines the dependencies between files and only recompiles files that have changed since the last build.

Basic Makefile Structure

A Makefile consists of rules. Each rule defines a target, its dependencies, and the command needed to build the target.

Makefile

# Define variables for easier maintenance
CC = gcc
CFLAGS = -Wall -c

# Rule 1: The final target (the executable)
app: main.o util.o
	$(CC) main.o util.o -o app

# Rule 2: How to build main.o (requires main.c and util.h)
main.o: main.c util.h
	$(CC) $(CFLAGS) main.c

# Rule 3: How to build util.o (requires util.c and util.h)
util.o: util.c util.h
	$(CC) $(CFLAGS) util.c

# Rule 4 (Cleanup): Phony target to remove generated files
.PHONY: clean
clean:
	rm -f *.o app

CRITICAL: The command line in a Makefile rule (e.g., $(CC) $(CFLAGS) main.c) must begin with a literal Tab character, not spaces.

Using make

1. To build the project: make (or make app)
2. If only util.c changes, make will only execute Rule 3 and Rule 1, skipping the compilation of main.c.
3. To clean up: make clean